Performance-Critical Applications of Parallel Architectures

Description

Project Title:
Performance-Critical Applications of Parallel Architectures
Acronym:
APPARC
Number:
6634
Work Area:
Parallel Computing and Architectures
Coordinator:
Rijksuniversiteit Leiden
Niels Bohrweg 2
NL - 2333 CA Leiden
Coordinator Country:
NL
Partners
KFA, Jühlich D
University of Copenhagen DK
Universidad Politecnica de Catalunya E
ONERA F
Université de Rennes I F
University of Patras GR
Queen's University, Belfast IRL
University of Manchester UK
Contact Point:
Prof. Dr. H.A.G. Wijshoff
Telephone:
+31/71 277063
Fax:
+31/71 276985
E-Mail:
harryw@cs.leidenuniv.nl
Keywords:
performance-critical components, sparse applications and algorithms, memory organisation
Start Date:
24 July 92
Duration:
36 months
Status:
running
Abstract:
High-performance computing (HPC) is a critical technology for future economic growth. Technical progress in HPC has been rapid only in a few application areas. Unfortunately, a large and important class of applications is not yet amenable to high-performance execution, due to a mismatch with currently available techniques at all levels of the computational problem-solving process. This class of computations can be referred to as performance-critical applications. It requires a concerted interdisciplinary research effort to break this barrier. The APPARC project addresses this urgent research need.

AIMS

Performance-critical applications typically involve manipulation of large, sparse discrete data objects. One of the major causes of low performance for these applications is the hardware memory organisation in present-day high-performance computers. Progress towards the general applicability of high-performance computing depends upon the removal of this memory performance barrier for the class of sparse computations. Hence sparse computations and hardware memory architecture form the main technical themes of the APPARC project.

APPROACH AND METHODS

The development of computational solutions to performance-critical applications embraces many different levels of abstraction, from mathematical modelling of the application, through algorithm and software development, to hardware implementation. Thus tackling the two project themes is no simple matter: the interaction between the applications and the memory architecture affects all levels of the problem-solving process. Consequently APPARC studies the two themes across eight interrelated enabling areas: performance-critical applications, parallel algorithms, problem-solving environments, performance modelling and evaluation, high-level languages, compiler design, operating systems, and hardware architecture.

PROGRESS AND RESULTS

Some of the major achievements of the APPARC consortium during the first year are: (1) the definition of cache performance models which are specifically targeted for sparse computations and do not rely on simulations, (2) a comprehensive analysis of data locality optimisations for optimising compilers, (3) the design of special hardware support to enable out of order memory accesses which relieve memory conflicts, and (4) a preliminary definition of a level of abstraction for sparse computations, which enables compiler optimisations to be performed for sparse computations. Furthermore, the first year deliverables were met and the APPARC consortium produced a substantial amount of APPARC-related publications. Four APPARC newsletters were issued and distributed to approximately 850 subscribers world-wide. In addition, the APPARC Application Set (APPARC-AS) was defined and the pooling of resources within the APPARC consortium was enforced.

POTENTIAL

The research groups involved in the APPARC proposal have considerable expertise, spanning all eight enabling areas. They also have strong links with leading research groups elsewhere in Europe and around the world. They are committed to collaboration in the interdisciplinary mode that will be necessary for APPARC research to succeed, and an extensive programme of workshops and exchange of personnel is planned. The APPARC group intends to interact strongly with the industrial community by firstly gathering information on the real computing challenges that industry is facing, and secondly, by disseminating research results to high-performance computer manufacturers and users via summer schools, advanced training courses and on-site visits.



Sven Müßig, last update 07-nov-1995. Your feedback is welcome.