SIMD-MIMD Processor Architectures Applied to Image Processing

Description

Project Title:
SIMD-MIMD Processor Architectures Applied to Image Processing
Acronym:
SM-IMP
Number:
8849
Work Area:
Basic aspects of multiple computing systems
Coordinator:
Technische Universiteit Delft
Faculty of Applied Physics, F1/PH
Lorentzweg 1
NL- 2600 GA DELFT
Coordinator Country:
NL
Partners
Parsytec Industry Systemen GmbH D
Thomson-CSF, LER F
Università di Genova, DIST I
University College London, Ph&A UK
Contact Point:
Dr.ir. P.P. Jonker
Telephone:
+31/15 783763 or +31/15 781416
Fax:
+31/15 626740
E-Mail:
pieter@ph.ln.tudelft.nl
Keywords:
computer architectures, parallel processing, VLSI design, transputers, image processing and image coding
Start Date:
to be announced
Duration:
months
Status:
starting
Abstract:
SM-IMP aims to explore a fusion of the SIMD and the MIMD paradigm from the application viewpoint (image processing and image coding), the programming viewpoint (parallel programming models) as well as from the technology viewpoint (VLSI/ULSI).

AIMS

The consortium aims to explore the fusion of the massively parallel SIMD paradigm and the MIMD paradigm. The project is expected to result in : the specification of an architecture; a simulator for the proposed architecture; system implementation specifications which are close to optimum for a specified selection of applications; and, if feasible within the time-frame of the project, breadboard hardware of main system parts.

APPROACH AND METHODS

SM-IMP will:
- Establish an architecture that is able to smoothly support the combined programming of low-, intermediate- and high-level image processing algorithms for two and three dimensional images. Candidate architectures will be simulated.
- Research the solution details that need to be found in order to obtain a fast and friendly programmable machine that equally supports the incorporated paradigms.
- Proceed to a breadboard hardware phase with any outstanding candidate design.
- Investigate the feasibility and performance of certain solutions when realised in VLSI technique.
- Design, implement and run a set of parallel algorithms in the aforementioned application fields and to compare their performance with their performance on other kinds of architectures.
- Investigate the cost and the performances of the architectural solutions.

POTENTIAL

The results of the project can be exploited both by the scientific community and by industry. It is explected that many parts of the architecture, breadboard hardware and possibly realised VLSI implementations can later be used as stand alone parallel processor building blocks or as peripheral chips to MIMD processors like the transputer series. At least one of the partners is able to pursuit the marketing of the result.



Sven Müßig, last update 07-nov-1995. Your feedback is welcome.